woensdag 11 maart 2020

FPGA First steps -2- (General procedure & Resetting the screen)

As mentioned in my previous blog post i started experimenting with a Cyclone ii FPGA. There are several steps involved. It can look complicated. Therefore before diving into details i will explain the big picture in this blogpost.

  •  Install the software
  •  Create the FPGA logic
  •  Connect inputs and outputs to physical ports (Pin Planner)
  •  Compiling the created logic
  •  Upload the project to the FPGA  (Program) 
  •  Test the project in the FPGA

Install Software:
To use my Cyclone ii FPGA
i installed Quartus ii  version 13.1 software on my computer (Windows 10)
and the USB blaster software
Quartus is a big program so downloading and installing will take a long time. It is more a interface connecting different parts for managing the FPGA. As it are different modules sometimes saving before switching to another module is needed.

Create the FPGA logic
To create the FPGA logic there are several options in the Quartus ii package e.g.
Graphical interface
VHDL
Verilog
As the graphical interface looks intuitive and i found a YouTube instruction about it. Therefore i started my first experiments with this.

Connect inputs and outputs to physical ports (Pin Planner)
To connect the logical inputs and outputs a part in Quartus named Pin Planner can be used.
Before this can be done the logical inputs and outputs needs to be present. These logical ports can be created easy by compiling the design. This first compilation will not output something that will work as at that moment the physical outputs are not included in the compilation.
However it will prepare the logical ports for the Pin Planner. In the Pin Planner these ports can be manual assigned to to physical ports.
After the assignment of the physical ports another compilation needs to be done to include information about the physical ports.

Compiling the created logic
Compiling is relative simple and can be started different ways:
Using the menu 
Processing - Start Compilation
Ctrl+L
The button with a triangle
The compilation can give Errors when the compilation was not successful. Otherwise there can (and will) be Warnings. 

Upload the project to the FPGA  (Program) 
To upload the result to the FPGA ("Programming") there are two options
Store it temporary 
Store it permanent
When storing it permanent it can be overwritten later by storing something else. The difference is that the settings are erased after powering the system down when storing it temporary. 

Test the project in the FPGA
Details how to test depends on the created logic.
It is also possible to test the created FPGA logic before uploading using a simulator.
This simulator requires some configuration.

Help
An important file with links to the software Handbook and other resources is can be found in Quartus ii under
  Help
     Readme File

During testing it you can easy change the displayed screen in Quartus II
It is possible to reset the windows to the setting during installation without repeating the installation process.
See https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd07092001_1535.html for two options to do this:

Using a menu option in the Quartus II Graphical User Interface (GUI):
Choose Tools and then select Toolbars.
Click the Toolbars tab.
Click Reset All.
Click OK.

Using a Windows Command (DOS) Prompt:
Close the Quartus II software.
Open a Windows command prompt or DOS window (Start -> Programs -> Command Prompt).
At a command prompt, change directory (using the cd command) to the Quartus installation directory/bin.
Type the following: quartus -reset_desktop

During my experiments/testing/learning i needed to use the second option (using the Windows Command prompt as i did not find another way to get the screen back in a reasonable status.

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